1. Field of the Invention
The present invention generally relates to a power distribution system and, more particularly, to a method of detuning resonant frequencies of a power distribution system by reshaping layouts of power/ground planes.
2. Description of the Related Art
The growing request for faster data throughput demands higher operating frequency, which constrains the maximum tolerable timing skew caused by noise. Besides, to reduce the electromagnetic interference (EMI) and the power consumption especially in a heavily dense layout, a lower voltage signaling is preferable. Both requirements motivate the study of power quality, aimed at providing better quality of the supply voltage and reducing possible noise sources when signaling. However, the power delivery quality is relatively unexplored for it normally involves a much more complicated system, called power distribution system (PDS).
A PDS of a multi-layer Printed Circuit Board (PCB) normally comprises power and ground planes as well as interconnecting vias, thus basically it is inductive. Consequently, the impedance of the power delivery system increases with the operating frequency. A high-speed, low-voltage signaling system demands low target impedance which relates to the supply voltage quality, especially at a high frequency regime. A common solution is adding sufficient number of vias, which will reduce the inductance of the system.
Another important problem of the PDS is an effect regarding to resonance. As mentioned above, the PDS consists of several conducting planes capable of storing energy forming resonators. If designed improperly, the operating frequency or its harmonics (e.g. 533 MHz and its third harmonics 1600 MHz) was located at or close to the resonant frequencies, then the supply voltage might vary with time imposing extra noise on the signal. Even a signal passing through the plane layers without physical contact, for example a signal via from top layer to the bottom layer, will couple some noise from the resonator. Besides, this resonance effect will deteriorate especially simultaneous switching noise (SSN/SSO) coupled from the signal via or return path, and will worsen the EMI problem since more energy is stored in the resonator. In any circumstance, the effect of resonance might result in not only Power Integrity (PI) but also serious Signal Integrity (SI) problems. Therefore, there is a pressing need to introduce an analysis for the resonant effect in the design phase.
Several remedies have been proposed. The most common solution is adding decoupling/bypass capacitors at a proper position that the capacitors provide an equivalent short loop for the high frequency noise. However, the application of the decoupling capacitor is limited by the equivalent series inductance (ESL) of the lead, where the capacitor becomes inductive at high frequency regime. Moreover, in some congested substrate layout, there is no sufficient space to allocate these extra capacitors.
Another remedy is to reduce a quality factor of the resonant system. This can be done by two ways. The first one is increasing loss by employing a lossy dielectric material. However, the most common dielectric material is epoxy-resin-fiber glass (FR4) possessed a loss tangent of 0.02 at 1 GHz, which is still insufficient to provide enough loss. Therefore, a new material must be developed. The other method is adding some lossy material at circuit board edges, called resistive termination. This method can effectively minimize the reflection and radiation from the edge discontinuity especially at a high frequency regime, but it fails to provide a broadband absorption due to a lack of an appropriate absorbing material.